1. Field of the Invention
The present invention relates to a flash memory device, and more particularly, to a sensing circuit for a flash memory device.
2. Description of the Related Art
With the development of various application systems such as mobile systems, the demand for flash memory devices, i.e., non-volatile memory devices, has increased. Particularly, as the operating power supply voltage for the devices has decreased, the necessity of a flash memory device capable of operating in a low power supply voltage has increased.
Usually, for a reading operation in a non-volatile memory device such as a flash memory device, a predetermined voltage is applied to a bit line in a main cell array and to a bit line in a reference cell array, and currents flowing in the two bit lines are compared to sense data stored in a memory cell within the main cell array. A swing width between the two bit lines directly affects reading speed and stress on a memory cell.
To increase the reading speed and reduce the stress on a memory cell in a non-volatile memory device during the reading operation, it is important to clamp a voltage in two bit lines at a predetermined level to reduce the voltage swing on the two bit lines.
Examples of conventional bit line sensing circuits used for a non-volatile memory device are disclosed in U.S. Pat. No. 6,233,189. However, conventional sensing circuits usually operate at a power supply voltage of 1.6 V or higher. When the power supply voltage increases even a small amount from a target voltage, bit line voltage swing also increases. As a result, reading speed may decrease, and stress on a memory cell may increase.